In build-up wiring substrates in which wiring layers and insulating layers are alternately stacked, an upper wiring layer and a lower wiring layer are connected through, for example, cylindrical via interconnects formed of copper (Cu) or the like.
For example, cylindrical via interconnects are formed in the following manner. First, a wiring layer is formed on an insulating layer, and a resist layer is formed on the insulating layer to cover the wiring layer. Then, cylindrical openings are formed in the resist layer to expose an upper surface of the wiring layer. The openings are filled with metal by electroplating or the like to form cylindrical via interconnects, and the resist layer is removed. Thereafter, an upper insulating layer is formed to cover the wiring layer and the via interconnects, and an upper wiring layer is further formed on the upper insulating layer to connect to the wiring layer through the via interconnects. (See, for example, Japanese Laid-open Patent Publication No. 5-110259.)